EP93XX. ARM. ®. 9 Embedded Processor Family. EP93xx. User’s Guide 8×8 Key Mtx. ARMT. Maverick. 18 Bit Raster. LCD I/F. Crunch. Notes on making a proper EABI cross compiler for Maverick Crunch (EP, EP93xx) processors. This is a bit of “higher order hacking” and. It’s already configured to build in /opt/toolchains/ directory. This work is based on patches by Martin Guy and tested both on Cirrus demo board for the EP

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High-Performance, Networked, ARM9, System-on-Chip Processor

The instructions shift by an unpredictable amount, but cause no other side effects. The following is from the EP rev E2 errata: It is, if and only if both: Obviously you need to get the unwind specification in the official ARM EABI documents first before implementing it in GCC, and binutils will also need to support generating correct information given. Here we only attempt to work around the bugs in the later series. For example, if a conditional coprocessor two-word load or store appears, ensure that the following instruction is not a coprocessor load or store: Zefeer specific integration guidelines.

Unfortunately these never worked well enough for it to be usable.

Add extra code to sign extend the lower word after it is loaded by explicitly forcing the upper word to be all zeroes or ep930 ones, as appropriate. Instruction format MaverickCrunch instructions are bit words that are interleaved with the regular ARM instrution stream. There is a long description of it at http: The second mverick instruction: Five mavrick of the EP93xx silicon were issued: In GCC output, this is further restricted to 0xe[cde] Execute a third instruction at least one of whose operands is the target of the previous two instructions.


In the sample I have tested a TS it is not operating in serialised mode by these criteria because no exceptions are enabled. Discussion specific to it usually happens on the linux-cirrus mailing list.

[linux-cirrus] I’m pretty close with Maverick Crunch on EP – linux-cirrus – FreeLists

A branch is taken and it is one of the two instructions in the branch delay slot. Let ep99302 second instruction be an instruction with the same target, but not be executed. This error can occur if the following is true: Code to enable forwarding under Linux with Maverick support enabled in the kernel, the effect is limited to the process that does this: Evaluation Board Electrical Schematics General carrier board maerick guidelines Zefeer specific integration guidelines.

Enhance your users’ audio experience through Cirrus Logic’s hardware and software solutions: Therefore typical applications of this module are interactive terminals, kiosks, advanced instruments, info-points electronics, and in general everything that must look like a PC without being a PC and without maveriick cost of a PC.

Making fast floating point math work on the Cirrus MaverickCrunch floating point unit

Buggy cfadd – cfaddne – cfstr Buggy cfadd – nop – cfaddne – cfstr Buggy cfadd – cfaddne – nop – cfstr OK cfadd – nop – nop – cfaddne – cfstr Buggy cfadd – nop – cfaddne – nop – cfstr Buggy cfadd – cfaddne – nop – nop – cfstr OK cfadd – nop – nop – nop – cfaddne – cfstr OK cfadd – nop – nop – cfaddne – nop – cfstr OK cfadd – nop – cfaddne – nop – nop – cfstr OK cfadd – cfaddne – nop – nop – nop – cfstr Buggy cfadd – cfaddne – cfaddne – cfstr Buggy cfadd – cfaddne – cfaddne – nop – cfstr OK cfadd – cfaddne – cfaddne – nop – nop – cfstr OK cfadd – nop – cfaddne – cfaddne – cfstr OK cfadd – nop – cfaddne – cfaddne – nop – cfstr OK cfadd – nop – cfaddne – cfaddne – nop – nop – cfstr The second instruction may also not be executed because it follows a branch: The default is saturating, which is wrong for C.


The value appearing in the target register will still be correct. By enabling or disabling the EP’s peripheral interfaces, designers can also reduce development costs and accelerate time to market by creating a single platform that can be modified to deliver differentiated end-products.

Five revisions of the silicon were issued: EPx Audio Optional Display: Audio Clock Generation and Jitter Reduction. GCC doesn’t emit conditional Maverick instructions and the jump case should fixed by mainline’s -mfix-cirrus-invalid-instructions. Deselects saturating arithmetic for integer operations and selects the usual C-like overflowing. Maveirck three places it is used as the first of a two-instruction sequence: On board RTC specifications. Mainline GCC support has never worked for it but there is a modified compiler available that does and that is able to generate Crunch-accelerated Debian packages.

Migrating to Zefeer Embedded Linux Kit 1. Cirrus Logic’s embedded processor products are complemented by a range of complete operating systems. Views Read Edit View history.